Embedded devices play an important role in our daily life, and more and more sensitive information is being processed on these devices each day. Therefore, embedded devices must provide a high level of protection against cyber attacks – despite their typically restricted computing resources. Commonly used cryptographic algorithms to secure these devices, however, are vulnerable to attacks using quantum computers. In the light of recent advances in quantum-computer development, a new field of post-quantum cryptography (PQC) has evolved, which provides cryptographic algorithms that are believed to be secure against using quantum computers. This talk focuses on one of the post-quantum secure signature schemes, the eXtended Merkle Signature Scheme (XMSS), which has been standardized by the IETF. XMSS have relatively high resource requirements. Therefore, running such post-quantum secure schemes efficiently on a resource-constraint embedded system is a difficult task. This talk introduces a number of hardware accelerators that provide a good time-area trade-off for implementing XMSS on RISC-V. Our experiments running on FPGAs demonstrate the feasibility of efficiently deploying the post-quantum signature scheme XMSS on an embedded device.